Fast write operations in non-volatile memories using latency masking

Energy consumption is an important issue in designing embedded systems and the emerging Internet of Things (IoT). The use of non-volatile memories instead of SRAM in these systems improves their energy consumption since non-volatile memories consume much less leakage power and provide better capacity given the same die area as SRAM. However, this can impose significant performance overhead because the write operation latency of non-volatile memories is more than that of SRAM. In this paper we presented an NVM-based data memory architecture for embedded systems which improves the performance of the system at the cost of a slight energy consumption overhead. The architecture employs multi-banking techniques to parallelize the write operations and adds a write buffer which masks the latency of some write operations and reduces the average write latency of the memory subsystem. Compared to a system which uses a single-bank NVM, the proposed architecture can improve the performance by 38% at the cost of 9% increase in the energy consumption.